double rounding in x86

[Samuel A. Figueroa]

In a previous message, Jonathan Shewchuk (jrsacs.cmu.edu) writes:
  >One interesting aspect of this case is that one can imagine designing a
  >processor in which each internal extended-precision register has two
  >accompanying tag bits that specify whether the register value has been
  >rounded up, has been rounded down, or is exact.  These tag bits could be
  >used during storage to ensure that the value is rounded as it would have
  >been if the result of the original computation had been rounded directly to
  >double-precision; hence double rounding is avoided.  I wonder if any
  >existing hardware does this?  I wonder if this idea is actually forbidden by
  >IEEE 754/854 because the second rounding is technically nonconformant?

I don't have my documents handy right now, but I remember reading that the
POWER architecture (implementations of which may be found in some IBM RS/6000
workstations) have bits indicating if the result of an operation was rounded
up or down.  I don't recall ever knowing what usefulness those bits had.

As for your second question, it all depends on whether you claim that your
floating-point engine consists of a combination of hardware and software (and
if so, which software), or hardware alone.  If you claim that the results
your hardware-only arithmetic engine produces are always stored in extended
precision registers, and you have an operation which converts numbers in
extended precision to double precision according to whether these bits are set,
you must also provide an operation which does the conversion without taking
these bits into account.  On the other hand, if your engine consists of a
combination of hardware and software, it doesn't matter how the hardware
performs operations, or where the hardware stores the results of operations,
since you can always fix up things in software.  The worst case is that you
have to do everything in software.

Two very crucial distinctions you have to make when claiming that a particular
engine conforms to the IEEE Standard is whether your implementation consists of
only hardware, and if not, what software it consists of; and where results of
operations are stored.  In fact, if you choose the right combination of
hardware and software, and you claim that results are always stored in memory,
you can argue that precision modes never need to be implemented, even if your
hardware is only capable of storing results of (the basic arithmetic)
operations to extended precision registers, as is the case in the Intel x86
and Motorola 68k architectures.