IEEE 754 rounding mode support -- a survey

Nelson H. F. Beebe uunet!math.utah.edu!beebe
Wed May 6 17:19:11 PDT 1992


With this posting, I'm not proposing to start a
debate on the nceg list, but I'd be happy to
receive comments directly from the readership, and
will summarize responses in a followup posting if
it seems worthwhile.

In an undergraduate class that I'm teaching this
quarter (Introduction to Scientific Computing with
Fortran, Part 2), I've been emphasizing the
importance of understanding and utilizing features
of IEEE 754 floating-point arithmetic, including
Inf, NaN, and rounding modes.

As an illustration, I offered the class the
problem of summing a series of descending terms,
and showed how the results varied depending on the
floating-point precision, summation order, and the
rounding mode chosen.  I have access to numerous
different architectures on which to test software,
so results were accumulated on over a dozen
systems.

In preparing numerical answers to illustrate the
discussions, I was surprised to find little
support for programmer access to IEEE 754 rounding
modes.  I also ran the test program on some
systems that use non-IEEE-754 arithmetic.  Here is
a portion of a LaTeX document the summarizes my
findings; just mentally delete the few TeX control
sequences (backslash-letters).

==================================================
On the IBM PC, the Microsoft C, Borland Turbo C,
and TopSpeed C compilers all offer a library
function, \verb=_control87()=, for programmer
control of IEEE 754 floating-point rounding modes.
Lahey Fortran provides no such facility.  However,
it can call Microsoft and Turbo C functions and
assembly code routines, so the facility could be
added.

On larger systems, Sun may be unique in offering
the Fortran programmer control over the rounding
mode in Motorola 68xxx (Sun 3), Intel 386 (Sun
386i), and SPARC (Sun 4) CPUs.

The Convex C1 and C220 systems offer only a
partial implementation of IEEE arithmetic, with
neither infinity, nor NaN, nor gradual underflow,
nor rounding-mode control.  The Convex native-mode
arithmetic is identical to that of the DEC VAX
architecture.

The 32-bit DEC VAX processors have a
single-precision format that resembles IEEE 754,
without gradual underflow or infinity.  There is a
floating-point reserved operand that is somewhat
like a NaN, but always causes a trap.  There are
two formats of double precision, D-floating, with
the same exponent range as in single precision,
and G-floating, with a range comparable to IEEE
754 64-bit precision.  The VAX architecture also
defines a quadruple-precision 128-bit
floating-point arithmetic, called H-floating.  In
the smaller VAX models, this is implemented
entirely in software.

The Hewlett-Packard PA-RISC architecture on the HP
9000\slash 7xx and 9000\slash 8xx machines
supports all four founding IEEE 754 modes, but
neither the compilers nor the run-time library
make them accessible to the Fortran or C
programmer.

The IBM 3090 mainframe floating-point arithmetic
is truncating, and has wobbling precision.  There
is no support for other rounding modes.

The IBM RS\slash6000 and coming DEC Alpha
processors provide only compile-time choice of
rounding modes.

Although the MIPS CPUs used in DECstation and
Silicon Graphics workstations have user-settable
rounding modes, neither vendor provides either a
compiler option or library support for doing so.
MIPS' own workstations have a manual page
describing a C run-time library routine,
\verb=fpsetround()=, for setting the
floating-point mode, but neither it nor its
associated include file could be found by the
compiler and linker.

Like the Sun 3, the NeXT uses the Motorola
floating-point processor, which uses 80-bit
arithmetic.  The longer precision likely accounts
for the low errors in Table~\ref{tab:relerr-next},
although the same behavior is not seen in the Sun
3 results in Table~\ref{tab:relerr-sun3}.

The Stardent 1520 hardware implements only
round-to-nearest, and gradual underflow is not
supported.
==================================================


========================================================================
Nelson H.F. Beebe
Center for Scientific Computing
Department of Mathematics
220 South Physics Building
University of Utah
Salt Lake City, UT 84112
USA
 Tel: (801) 581-5254
 FAX: (801) 581-4148
 Internet: beebeamath.utah.edu
========================================================================



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