Followup: Standard extended form

[Bill Janssen]

I'd like to thank those who've helped with answers to my question, ``Can
anyone tell me if there is a standard, or an emerging standard, or a de
facto standard, for floating point representations longer than 64
bits?''  The answer seems to be, maybe the 8087 ``temporary real''
format, which I think is copied in at least the SPARC and the Motorola
68881 -- but here are the representations:

Date:	Tue, 18 Jan 1994 20:46:37 -0800
From:	validgh!dghauunet.uu.net (David G. Hough at validgh)

SPARC and PARISC define identical 128-bit quad IEEE formats, so far not
implemented in hardware.  RS/6000 defines a non-IEEE 128-bit format
composed of two doubles.  x86 defines an 80-bit extended format.

[ Presumably these formats are ``IEEE'' because they satisfy the
constraints for ``extended double'' outlined in IEEE 754-1985, which
leaves the specific representation up to the implementation.  SPARC (my
architecture manual is old, Version 7), for instance, actually uses an
80 bit extended double format that occupies 128 bits:

    a 1 digit sign (`s' -- bit 31 of the first 32-bit (numbered 0-31) word),
    a 15-bit biased exponent (`e' -- bits 16-30 of the first 32-bit word),
    a one-bit `integer flag' (`j' -- bit 31 of the second 32-bit word),
    and a 63 bit fraction (`f' -- bits 0-30 of the second 32-bit word are the msb, and bits 0-31 of the third word are the lsb).

Bits 0-15 of the first word, and 0-31 of the fourth word, are
`reserved', to account for the whole 128 bits.  Values are represented
according to the following scheme:

    normalized number (0<=e<32767; j = 1) => ((-1)**s)*(2**(e-16383))*j.f);
    subnormal (e==0; j==0) => ((-1)**s)*(2**(-16383))*j.f;
    zero (s == 0; e == 0) => 0*(-1)**s;
    NaN => e = 32767, ``at least one digit of f is 0'';
    quiet NaN => e == 32767, ``the most significant digit of f is 1'';
    infinity => e==32767, ``f is all zeros''.

I believe that this is the same format as the 8087's ``temporary real''
format, which I assume is the aforementioned x86 80-bit format, except
that the 8087 format is packed into 5 16-bit words, rather than being
spread around 4 32-bit words.  Can anyone verify that?

This also seems to be the format used by the Motorola 68881, except that
the 80 bits are spread across 96 bits, with 16 bits of zero between the
exponent and the mantissa. ]

Date:	Wed, 19 Jan 1994 03:21:52 -0800
From:	Gideon Yuval <gideonyamicrosoft.com>

The 8087/80287/80387/80486DX/Pentium have an 80-bit format in the
register file (called "long double" in MS C).

Date:	Wed, 19 Jan 1994 12:39:28 -0800
From:	validgh!sun!Eng!Gregory.Tarsyauunet.uu.net (Gregory V. Tarsy)

IEEE 754 specifies double extended which has a precision >= 64 and a
format width of >= 79. Quad precision is also defined as a 128 bit
double extended format with 113 bits of precision on SPARC.

[ I don't have documentation on this SPARC format.  Must be added after
version 7.  Can someone provide details? ]

[ Additionally, MIPS and DEC Alpha explicitly refrain from defining an
IEEE extended double format. ]

Thanks again,

Bill