88110 extended precision - from comp.arch

[David G. Hough on validgh]

As rumored, the 88110 supports 680x0-style extended precision, presumably
to support Apple's former requirements, but they seem to have anticipated
the possibility that Apple/IBM might have different or additional
requirements.  In response to somebody else's comments,
keithdaoakhill.sps.mot.com (Keith Diefendorff) wrote in comp.arch:

>> The extended precision float reads and writes 128 bits, but only to the
>> extended register file, and it clobbers the lower 48 bits ! 

>The 88110's quad-word loads and stores were designed to 
>support the IEEE double-extended (80-bit) data type in a way 
>which is forward compatible with a possible future extension 
>to full 128-bit quad-precision floating-point.  It was *NOT* 
>designed for moving data.