IEEE Symposium on Computer Arithmetic - July 1997
Joseph Cavallaro
cavallaraece.rice.edu
Mon Apr 28 12:05:40 PDT 1997
ARITH 13
13th IEEE Symposium on Computer Arithmetic
Asilomar, California, USA
July 6 - July 9, 1997
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PLEASE SEE THE CONFERENCE WWW PAGE at http://www.eng.uci.edu/~arith13
for information and forms for Registration and Lodging.
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PROGRAM
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Sunday July 6th, 1997
Registration and Reception
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Monday July 7th, 1997
SESSION 1: ARITHMETIC CIRCUITS
Chair: George Taylor
A Radix-8 CMOS S/390 Multiplier
E. Schwarz, R. Averill, L. Sigal
A GaAs 32-bit Adder
A. Beaumont-Smith, N. Burgess
SRT Division Architectures and Implementations
D. Harris, S. Oberman, M. Horowitz
Power-Delay Characteristics of CMOS Multipliers
T. Callaway, E. Swartzlander
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Lunch
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SESSION 2: NUMBER SYSTEMS
Chair: Israel Koren
On Radix Representation of Rings
A. Munk Nielsen, P. Kornerup
Theory and Applications for a Double-Base Number System
V.S. Dimitrov, G.A. Jullien, W.C. Miller
SESSION 3: FLOATING-POINT ARITHMETIC - 1
Chair: William McAllister
On the Design of IEEE Compliant Floating Point Units
G. Even, W. Paul
A Priory Worst Case Error Bounds for Floating-Point Computations
W. Kraemer
SESSION 4: DIVISION, RECIPROCATION, MULTIPLICATION AND EXPONENTIATION
Chair: Milos Ercegovac
Multiprecision Division on an 8-bit Processor
E. Rice, R. Hughey
Faithful Interpolation in Reciprocal Tables
D. Das Sarma, D.W. Matula
Exponentiation using Division Chains
C. Walter
Implementing the Multiply-Accumulate Operation in Multiplication Time
P.F. Stelling and V. Oklobdzija
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Tuesday July 8th, 1997
SESSION 5: ROTATIONS AND ELEMENTARY FUNCTIONS - 1
Chair: Jeong-A Lee
CORDIC Vectoring with Arbitrary Target Values
T. Lang, E. Antelo
Fast Rotation: Low-cost Arithmetic Methods for Orthonormal Rotation
G. Hekstra, E. Deprettere
Generating a Power of an Operand by a Table Look-up and a Multiplication
N. Takagi
Towards Correctly Rounded Transcendentals
V. Lefevre, J.-M. Muller, A. Tisserand
SESSION 6: FLOATING-POINT ARITHMETIC - 2
Chair: Ted Williams
Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder
D.W. Matula, A.M. Nielsen
Pipelined Packet-Forwarding Floating Point: II. An Adder
A.M. Nielsen, D.W. Matula, G. Even, C.N. Lyu
The SNAP Project: Design of Floating-Point Arithmetic Units
S. Oberman, H. Al-Twaijry, M. Flynn
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Lunch
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SESSION 7: ELEMENTARY FUNCTIONS - 2
Chair: Dan Zuras
Fast Table-Driven Algorithms for Interval Elementary Functions
D. Priest
Symmetric Bipartite Tables for Accurate Function Approximation
M. Schulte, J. Stine
A High-Performance Hardware for Function Generation
J. Cao, B. Wei
SESSION 8: COMPLEX ARITHMETIC
Chair: Renato Stefanelli
Arithmetic Co-transformations in the Real and Complex Logarithmic Number
Systems
M. G. Arnold, T. A. Bailey, J. R. Cowles, M. D. Winkel
Real/Complex Reconfigurable Arithmetic Using Redundant Complex Number
Systems
T. Aoki, H. Amada, T. Higuchi
Algorithms for Multi-Exponentiation based on Complex Arithmetic
V.S. Dimitrov, G.A. Jullien, W.C. Miller
SESSION 9: RESIDUE NUMBER SYSTEMS, FINITE FIELDS AND CRYPTOGRAPHY - 1
Chair: Luigi Dadda
Fraction-free RNS Algorithms for Solving Linear Systems
P.R. Turner
Fast Software Exponentiation in GF(2^k)
C.K. Koc, T. Acar
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Wednesday July 9th, 1997
SESSION 10: RESIDUE NUMBER SYSTEMS, FINITE FIELDS AND CRYPTOGRAPHY - 2
Chair: Simon Knowles
An RNS Montgomery Modular Multiplication Algorithm
J-C. Bajard, L-S. Didier, P. Kornerup
Design and Implementation of an RNS Division Algorithm
A. Hiasat, H. Abdel-Aty-Zohdy
Scaled and Unscaled RNS to Binary Conversion Techniques using the Core
Function
N. Burgess
SESSION 11: MISCELLANEOUS
Chair: To be assigned
On-the-Fly Algorithms and Sequential Machines
C. Frougny
Half-Adder Form and Early Branch Condition Resolution
D. R. Lutz, D. N. Jayasimha
Synchronous Up/Down Counters with Period Independent of Counter Size
M. Stan
A Q-Coder Algorithm with Carry Free Addition
G. Cena, P. Montuschi, L. Ciminiera, A. Sanna
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Panel (day to be announced):
SIMD Floating Point for Multimedia - Industry or IEEE Standards
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