integer division exceptions on SGI

[Michael Meissner]

| There is, however, a compiler patch we have been offered; I am told
| this was requested by (among others?) NYU.  But I haven't been told
| by SGI *what* this patch does.  Does it insert extra test instructions,
| and if so at what cost (or do I care since the division is so slow
| all else will be masked by the division time?)?

Given that the MIPS does division by putting the result in the HI/LO
registers, and then you have to move it to a general purpose register,
a compiler can emit the test and trap after the division instruction
is started, and it will go in parallel with the division instruction
(which takes quite a few clocks).  It might possibly slow things down
because you have a few extra instructions, which lowers the icache
effectiveness, or if the compiler was so successful in filling all of
the instruction slots while the division is going on and before the
result is needed (doubtful).  I know I did similar tricks on the
Motorola 88100 (though there you have to be careful not to emit the
output in the same register as either of the inputs).

-- 
Michael Meissner, Cygnus Support (East Coast)
Suite 105, 48 Grove Street, Somerville, MA 02144, USA
meissneracygnus.com,	617-629-3016 (office),	617-629-3010 (fax)