bit-for-bit IEEE compliance vs performance - strict compliance bit

[Norbert Juffa]

On Fri, 29 Sep 1995, Tom Lynch wrote:

> 
> I can add a mode bit to an x86 processor that when set would have the
> effect of causing values to round to the IEEE format indicated by the
> precision control field.  E.g. rounding to double would ignore the
> extra exponent range.  The mode would be off by default; thus insuring
> compatibility with existing code.  This would be the "strict IEEE
> compliance" mode.
> 
> I believe that such a mode would solve the compiler issues right? .. at
> least for this AMD processor.  Of course other Vendors could do this
> also.  Any one else out there want to settle on a place for the bit?

I think this is a great idea, if indeed it would solve the compiler
writers problems (it seems to me it does, but then I am not a compiler
person). Where to stick this additional control bit? I would like to
propose bit 13 in the FPU control word. It looks like right now the
control word is logically split, the lower half having all the masks,
and the upper half having the control bits. Also, bit 6 seems to be
stuck at 1 on all current implementations, and bit 7 used to be the
IEM bit on the 8087, so there is an incentive not to use it, just in
case their might be some code that actually writes something to this
bit. Observing the actual use of control words by x86 code, I see that
the unused bits 15, 14, and 13 are typically written 0, while the unused
bits 7 and 6 are typically written 1. In fact, I have never seen code
that writes 1s to bits 15, 14, or 13. So since bit 13 is the first
available and "safe" bit starting from the least significant end, I would
propose to use it for the "PC with restricted exponent" control.


-- Norbert Juffa (norbertanexgen.com)