logic design position available at QED

[Earl Killian]

We are looking for engineers with three or more years of experience in
floating-point logic design for high performance, custom
microprocessors.  Experience with fused multiply/add floating point
units is especially desirable.  These engineers will be responsible
for the micro-architecture, RTL model, logic design, and logic
simulation of specific processor functions.  Further responsibilities
are to work with verification engineers to guarantee logical
correctness and with circuit design engineers regarding floor
planning, layout supervision, timing verification, and schedule.

(Openings in verification and circuit design also exist.)

QED is a small VLSI design company that specializes in RISC
microprocessors.  Our first product is the R4600, which implements the
MIPS RISC Architecture with more performance than the R4000 in about
half the area.  The R4600 has many design wins, including an upgrade
to Silicon Graphics' Indy product line.  We are adding to our staff
for new projects now underway.

Please send resumes to
	Earl Killian
	QED
	2670 Seely Ave
	San Jose, CA 95134
	FAX: (408) 944-2069