IEEE double extended format

[Jerry Huck]

> The IEEE standard 754 does not specify an exact format for double extended
> but only gives some minimum requirements.  It appears to me that a de facto
> standard has emerged:
> 
>     1 bit for the sign
>    15 bits for the exponent
>   112 bits for the fraction
>   ---
>   128 bits total
>     1 implicit bit, so 113 bits for the significand
> 
>       exponent bias of +16383
> 
> My questions are:
> 
> 1)  Do you think that this is the appropriate format for double extended?

Yes.  The latest architecture manual (part #09740-90039) on PA-RISC
uses this same format.  HP Fortran supports this format as REAL*16 and
ANSI C as "long double" (although implemented in software).  Hard to
convince the hardware folks to spend the silicon right now.

> 2)  Do you know of any manufacturer that is going a different direction, 
>     and if so, why?

Need to check on IBM's "doubled" format used in the RS/6000.  Perhaps
someone at IBM could comment on how its defined and used.  I'm not
sure if its a "double extended" format or only a > 64-bit format.

> 
> 3)  Is "quad format" an appropriate term for this format?

Yes.

Jerry Huck  (huckansa.hp.com)
Computer System Architecture
Hewlett-Packard