IEEE single precision arithmetic on the IBM RS/6000

[Samuel A. Figueroa]

I am wondering if anyone has noticed that there is no provision for
IEEE single precision arithmetic in IBM's POWER architecture (though
single precision arithmetic can be simulated by following each double
precision f-p arithmetic instruction with the frsp [round to single
precision] instruction, with a subsequent loss of speed).  A couple
months ago I worked out what it would take to correctly simulate IEEE
single precision arithmetic (without worrying about correctly setting
the exception flags), and found out that using the frsp instruction
is almost always enough.  Is the fact that this result has not been
mentioned on this mailing list in the last couple years due to it
being obvious or uninteresting?
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Sam Figueroa (figueroaacs.nyu.edu)
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